SH7750_08 Datasheet, PDF (1030/1162 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 22 Electrical Characteristics
22.3.2 Control Signal Timing
Table 22.32 Control Signal Timing (1)
HD6417750 HD6417750
RBP240 (V) RBP200 (V)
HD6417750 HD6417750 _{HD6417750 HD6417750}
RBG240 (V) RBG200 (V) _{RF240 (V) RF200 (V)}
*
*
*
*
Item
BREQ setup
time
BREQ hold
time
BACK delay
time
Symbol Min
t_BREQS
2
t_BREQH
1.5
t_BACKD
—
Max
—
—
5.3
Min Max
2.5 —
1.5 —
—6
Min Max
3.5 —
1.5 —
—6
Min Max Unit Figure
3.5 — ns 22.13
1.5 — ns 22.13
— 6 ns 22.13
Bus tri-state t_BOFF1
delay time
— 12
— 12
— 12
— 12 ns 22.13
Bus tri-state
delay time
to standby
mode
t_BOFF2
—2
—2
—2
—2
t_cyc 22.14
(2)
Bus buffer
t_BON1
on time
— 12
— 12
— 12
— 12 ns 22.13
Bus buffer
t_BON2
on time from
standby
—2
—2
—2
—2
t_cyc 22.14
(2)
STATUS0/1 t_STD1
delay time
—6
—6
—6
—6
ns 22.14
(1)
t_STD2
—2
—2
—2
—2
t_cyc 22.14
(1), (2)
t_STD3
—2
—2
—2
—2
t_cyc 22.14
(2)
Note:
*
V = 3.0 to 3.6 V, V = 1.5 V, T = –20 to +75°C, C = 30 pF, PLL2 on
DDQ
DD
a
L
Notes
Rev.7.00 Oct. 10, 2008 Page 946 of 1074
REJ09B0366-0700