PIC16LF18854 Datasheet, PDF (97/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
REGISTER 4-5:
CONFIG5: CONFIGURATION WORD 5: CODE PROTECTION
U-1
U-1
U-1
U-1
U-1
—
—
—
—
—
bit 13
U-1
—
bit 8
U-1
U-1
U-1
U-1
U-1
U-1
R/P-1
R/P-1
—
—
—
—
—
—
CPD
CP
bit 7
bit 0
Legend:
R = Readable bit
‘0’ = Bit is cleared
P = Programmable bit
‘1’ = Bit is set
x = Bit is unknown
W = Writable bit
U = Unimplemented bit, read
as ‘1’
n = Value when blank or after
Bulk Erase
bit 13-2
bit 1
bit 0
Unimplemented: Read as ‘1’
CPD: Data NVM (EEPROM) Memory Code Protection bit
1 = EEPROM code protection disabled
0 = EEPROM code protection enabled
CP: Program Flash Memory Code Protection bit
1 = Program Flash Memory code protection disabled
0 = Program Flash Memory code protection enabled
 2016 Microchip Technology Inc.
Preliminary
DS40001824A-page 97