PIC16LF18854 Datasheet, PDF (247/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
13.8 Register Definitions: PPS Input Selection
REGISTER 13-1: xxxPPS: PERIPHERAL xxx INPUT SELECTION⁽¹⁾
U-0
—
bit 7
U-0
R/W-q/u
R/W-q/u
R/W/q/u
R/W-q/u
—
xxxPPS<5:0>
R/W-q/u
R/W-q/u
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
q = value depends on peripheral
bit 7-6
bit 5-0
Unimplemented: Read as ‘0’
xxxPPS<5:0>: Peripheral xxx Input Selection bits
See Table 13-2.
Note 1:
2:
The “xxx” in the register name “xxxPPS” represents the input signal function name, such as “INT”,
“T0CKI”, “RX”, etc. This register summary shown here is only a prototype of the array of actual registers,
as each input function has its own dedicated SFR (ex: INTPPS, T0CKIPPS, RXPPS, etc.).
Each specific input signal may only be mapped to a subset of these I/O pins, as shown in Table 13-2.
Attempting to map an input signal to a non-supported I/O pin will result in undefined behavior. For
example, the “INT” signal map be mapped to any PORTA or PORTB pin. Therefore, the INTPPS register
may be written with values from 0x00-0x0F (corresponding to RA0-RB7). Attempting to write 0x10 or
higher to the INTPPS register is not supported and will result in undefined behavior.
 2016 Microchip Technology Inc.
Preliminary
DS40001824A-page 247