PIC16LF18854 Datasheet, PDF (548/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
REGISTER 32-5: SMTxWIN: SMT1 WINDOW INPUT SELECT REGISTER
U-0
—
bit 7
U-0
U-0
R/W-0/0
R/W-0/0
R/W-0/0
—
—
WSEL<4:0>
R/W-0/0
R/W-0/0
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
q = Value depends on condition
bit 7-5
bit 4-0
Unimplemented: Read as ‘0’
WSEL<4:0>: SMTx Window Selection bits
11111 = Reserved
•
•
•
11000 = Reserved
10111 = LC4_out
10110 = LC3_out
10101 = LC2_out
10100 = LC1_out
10011 = ZCD1_output
10010 = C2OUT_sync
10001 = C1OUT_sync
10000 = PWM7_out
01111 = PWM6_out
01110 = CCP5_out
01101 = CCP4_out
01100 = CCP3_out
01011 = CCP2_out
01010 = CCP1_out
01001 = SMT2_match⁽¹⁾
01000 = SMT1_match⁽¹⁾
00111 = TMR6_postscaled
00110 = TMR4_postscaled
00101 = TMR2_postscaled
00100 = TMR0_overflow
00011 = SOSC
00010 = MFINTOSC/16
00001 = LFINTOSC
00000 = SMTxWINPPS
Note 1: The SMT_match corresponding to the SMT selected becomes reserved.
DS40001824A-page 548
Preliminary
 2016 Microchip Technology Inc.