PIC16LF18854 Datasheet, PDF (96/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
REGISTER 4-4: CONFIG4: CONFIGURATION WORD 4: MEMORY
R/P-1 R/P-1 U-1 U-1 U-1 U-1 U-1 U-1 U-1 U-1 U-1 U-1 R/P-1 R/P-1
LVP SCANE —
—
—
—
—
—
—
— — — WRT<1:0>
bit 13
bit 0
Legend:
R = Readable bit
‘0’ = Bit is cleared
P = Programmable bit
‘1’ = Bit is set
x = Bit is
unknown
U = Unimplemented bit, read as ‘1’
W = Writable bit n = Value when blank or after Bulk Erase
bit 13
bit 12
bit 11-2
bit 1-0
LVP: Low-Voltage Programming Enable bit
1 = Low-Voltage Programming is enabled. MCLR/VPP pin function is MCLR. MCLRE Configuration bit is
ignored.
0 = High voltage (meeting VIHH level) on MCLR/VPP must be used for programming.
The LVP bit cannot be written (to zero) while operating from the LVP programming interface. This prevents
accidental lockout from low-voltage programming while using low-voltage programming. High voltage
programming is always available, regardless of the LVP Configuration bit value.
SCANE: Scanner Enable bit
1 = Scanner module is available for use, SCANMD bit enables the module.
0 = Scanner module is NOT available for use, SCANMD bit is ignored.
Unimplemented: Read as ‘1’
WRT<1:0>: Program Flash Self-Write Erase Protection bits
11 = Write protection off
10 = 0000h to 01FFh write-protected, 0200h to 3FFFh may be modified by EECON control
01 = 0000h to 1FFFh write-protected, 2000h to 3FFFh may be modified by EECON control
00 = 0000h to 3FFFh write-protected, no addresses may be modified by EECON control
DS40001824A-page 96
Preliminary
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