PIC16LF18854 Datasheet, PDF (586/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
REGISTER 34-2: CLKRCLK: CLOCK REFERENCE CLOCK SELECTION REGISTER
U-0
U-0
U-0
U-0
R/W-0/0
R/W-0/0
R/W-0/0
—
—
—
—
CLKRCLK<3:0>
bit 7
R/W-0/0
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-4
bit 3-0
Unimplemented: Read as ‘0’
CLKRCLK<3:0>: CLKR Input bits
Clock Selection
1111 = Reserved
•
•
•
1010 = Reserved
1001 = LC4_out
1000 = LC3_out
0111 = LC2_out
0110 = LC1_out
0101 = NCO output
0100 = SOSC
0011 = MFINTOSC-500 kHz
0010 = LFINTOSC
0001 = HFINTOSC
0000 = FOSC
TABLE 34-1: SUMMARY OF REGISTERS ASSOCIATED WITH CLOCK REFERENCE OUTPUT
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register
on Page
CLKRCON CLKREN
—
—
CLKRDC<1:0>
CLKRDIV<2:0>
585
CLKRCLK
—
—
—
—
CLKRCLK<3:0>
586
CLCxSELy
—
—
—
LCxDyS<4:0>
329
MDCARH
—
—
—
—
MDCHS<3:0>
400
MDCARL
—
—
—
—
MDCLS<3:0>
401
RxyPPS
—
—
—
RxyPPS<4:0>
248
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the CLKR module.
DS40001824A-page 586
Preliminary
 2016 Microchip Technology Inc.