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PIC16LF18854 Datasheet, PDF (378/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture
PIC16(L)F18856/76
24.1 NCO OPERATION
The NCO operates by repeatedly adding a fixed value to
an accumulator. Additions occur at the input clock rate.
The accumulator will overflow with a carry periodically,
which is the raw NCO output (NCO_overflow). This
effectively reduces the input clock by the ratio of the
addition value to the maximum accumulator value. See
Equation 24-1.
The NCO output can be further modified by stretching
the pulse or toggling a flip-flop. The modified NCO
output is then distributed internally to other peripherals
and can be optionally output to a pin. The accumulator
overflow also generates an interrupt (NCO_overflow).
The NCO period changes in discrete steps to create an
average frequency. This output depends on the ability
of the receiving circuit (i.e., CWG or external resonant
converter circuitry) to average the NCO output to
reduce uncertainty.
EQUATION 24-1: NCO OVERFLOW FREQUENCY
FOVERFLOW= N-----C----O-------C----l--o----c---k----F----r---e---q---u----e---n2---2c--0-y---------I---n---c---r---e---m----e---n----t----V----a---l--u---e-
24.1.1 NCO CLOCK SOURCES
Clock sources available to the NCO include:
• HFINTOSC
• FOSC
• LC1_out
• LC2_out
• LC3_out
• LC4_out
The NCO clock source is selected by configuring the
N1CKS<2:0> bits in the NCO1CLK register.
24.1.2 ACCUMULATOR
The accumulator is a 20-bit register. Read and write
access to the accumulator is available through three
registers:
• NCO1ACCL
• NCO1ACCH
• NCO1ACCU
24.1.3 ADDER
The NCO Adder is a full adder, which operates
independently from the source clock. The addition of
the previous result and the increment value replaces
the accumulator value on the rising edge of each input
clock.
24.1.4 INCREMENT REGISTERS
The increment value is stored in three registers making
up a 20-bit incrementer. In order of LSB to MSB they
are:
• NCO1INCL
• NCO1INCH
• NCO1INCU
When the NCO module is enabled, the NCO1INCU and
NCO1INCH registers should be written first, then the
NCO1INCL register. Writing to the NCO1INCL register
initiates the increment buffer registers to be loaded
simultaneously on the second rising edge of the
NCO_clk signal.
The registers are readable and writable. The increment
registers are double-buffered to allow value changes to
be made without first disabling the NCO module.
When the NCO module is disabled, the increment
buffers are loaded immediately after a write to the
increment registers.
Note: The increment buffer registers are not user-
accessible.
DS40001824A-page 378
Preliminary
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