PIC16LF18854 Datasheet, PDF (186/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
11.0 CYCLIC REDUNDANCY CHECK
(CRC) MODULE
The Cyclic Redundancy Check (CRC) module provides
a software-configurable hardware-implemented CRC
checksum generator. This module includes the following
features:
• Any standard CRC up to 16 bits can be used
• Configurable Polynomial
• Any seed value up to 16 bits can be used
• Standard and reversed bit order available
• Augmented zeros can be added automatically or
by the user
• Memory scanner for fast CRC calculations on
program memory user data
• Software loadable data registers for calculating
CRC values not from the memory scanner
11.1 CRC Module Overview
The CRC module provides a means for calculating a
check value of program memory. The CRC module is
coupled with a memory scanner for faster CRC
calculations. The memory scanner can automatically
provide data to the CRC module. The CRC module can
also be operated by directly writing data to SFRs,
without using the scanner.
11.2 CRC Functional Overview
The CRC module can be used to detect bit errors in the
Flash memory using the built-in memory scanner or
through user input RAM memory. The CRC module can
accept up to a 16-bit polynomial with up to a 16-bit seed
value. A CRC calculated check value (or checksum)
will then be generated into the CRCACC<15:0> regis-
ters for user storage. The CRC module uses an XOR
shift register implementation to perform the polynomial
division required for the CRC calculation.
EXAMPLE 11-1: BASIC CRC OPERATION
EXAMPLE
CRC-16-ANSI
x¹⁶ + x¹⁵ + x² + 1 (17 bits)
Standard 16-bit representation = 0x8005
CRCXORH = 0b10000000
CRCXORL = 0b0000010- ⁽¹⁾
Data Sequence:
0x55, 0x66, 0x77, 0x88
DLEN = 0b0111
PLEN = 0b1111
Data entered into the CRC:
SHIFTM = 0:
01010101 01100110 01110111 10001000
SHIFTM = 1:
10101010 01100110 11101110 00010001
Check Value (ACCM = 1):
SHIFTM = 0: 0x32D6
CRCACCH = 0b00110010
CRCACCL = 0b11010110
SHIFTM = 1: 0x6BA2
CRCACCH = 0b01101011
CRCACCL = 0b10100010
Note 1:
Bit 0 is unimplemented. The LSb of any CRC
polynomial is always ‘1’ and will always be
treated as a ‘1’ by the CRC for calculating the
CRC check value. This bit will be read in soft-
ware as a ‘0’.
11.3 CRC Polynomial Implementation
Any standard polynomial up to 17 bits can be used. The
PLEN<3:0> bits are used to specify how long the
polynomial used will be. For an xⁿ polynomial, PLEN =
n-2. In an n-bit polynomial the xⁿ bit and the LSb will be
used as a ‘1’ in the CRC calculation because the MSb
and LSb must always be a ‘1’ for a CRC polynomial.
For example, if using CRC-16-ANSI, the polynomial will
look like 0x8005. This will be implemented into the
CRCXOR<15:1> registers, as shown in Example 11-1.
DS40001824A-page 186
Preliminary
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