PIC16LF18854 Datasheet, PDF (159/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
TABLE 8-1: SUMMARY OF REGISTERS ASSOCIATED WITH POWER-DOWN MODE
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register
on Page
INTCON
GIE
PEIE
—
—
—
—
—
INTEDG
132
PIE0
—
—
TMR0IE IOCIE
—
—
—
INTE
133
PIE1
OSFIE CSWIE
—
—
—
—
ADTIE
ADIE
134
PIE2
—
ZCDIE
—
—
—
—
C2IE
C1IE
135
PIE3
—
—
RCIE
TXIE BCL2IE SSP2IE BCL1IE SSP1IE
136
PIE4
—
—
TMR6IE TMR5IE TMR4IE TMR3IE _{TMR2IE TMR1IE}
137
PIR0
—
—
TMR0IF IOCIF
—
—
—
INTF
142
PIR1
OSFIF CSWIF
—
—
—
—
ADTIF
ADIF
143
PIR2
—
ZCDIF
—
—
—
—
C2IF
C1IF
144
PIR3
—
—
RCIF
TXIF BCL2IF SSP2IF BCL1IF SSP1IF
145
PIR4
—
—
TMR6IF TMR5IF TMR4IF TMR3IF TMR2IF TMR1IF
146
IOCAP
IOCAP7 IOCAP6 IOCAP5 IOCAP4 IOCAP3 IOCAP2 IOCAP1 IOCAP0
260
IOCAN
IOCAN7 IOCAN6 IOCAN5 IOCAN4 IOCAN3 IOCAN2 IOCAN1 IOCAN0
260
IOCAF
IOCAF7 IOCAF6 IOCAF5 IOCAF4 IOCAF3 IOCAF2 IOCAF1 IOCAF0
260
IOCCP
IOCCP7 IOCCP6 IOCCP5 IOCCP4 IOCCP3 IOCCP2 IOCCP1 IOCCP0
262
IOCBP
IOCBP7 IOCBP6 IOCBP5 IOCBP4 IOCBP3 IOCBP2 IOCBP1 IOCBP0
261
IOCBN
IOCBN7 IOCBN6 IOCBN5 IOCBN4 IOCBN3 IOCBN2 IOCBN1 IOCBN0
261
IOCBF
IOCBF7 IOCBF6 IOCBF5 IOCBF4 IOCBF3 IOCBF2 IOCBF1 IOCBF0
261
IOCCN
IOCCN7 IOCCN6 IOCCN5 IOCCN4 IOCCN3 IOCCN2 IOCCN1 IOCCN0
262
IOCCF
IOCCF7 IOCCF6 IOCCF5 IOCCF4 IOCCF3 IOCCF2 IOCCF1 IOCCF0
262
IOCEP
—
—
—
—
IOCEP3
—
—
—
263
IOCEN
—
—
—
—
IOCEN3
—
—
—
263
IOCEF
—
—
—
—
IOCEF3
—
—
—
264
STATUS
—
—
—
TO
PD
Z
DC
C
38
VREGCON —
—
—
—
—
—
VREGPM Reserved 157
CPUDOZE IDLEN DOZEN
ROI
DOE
—
DOZE<2:0>
158
WDTCON0 —
—
WDTPS<4:0>
SWDTEN 164
IOCEP
—
—
—
—
IOCEP3
—
—
—
263
IOCEN
—
—
—
—
IOCEN3
—
—
—
263
IOCEF
—
—
—
—
IOCEF3
—
—
—
264
Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used in Power-Down mode.
 2016 Microchip Technology Inc.
Preliminary
DS40001824A-page 159