PIC16LF18854 Datasheet, PDF (187/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
FIGURE 11-1:
CRC LFSR EXAMPLE
Data in
b15
Linear Feedback Shift Register for CRC-16-ANSI
x¹⁶ + x¹⁵ + x² + 1
Augmentation Mode ON
b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2
Rev. 10-000207A
5/27/2014
b1 b0
Augmentation Mode OFF
b15
b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2
Data in
b1 b0
11.4 CRC Data Sources
Data can be input to the CRC module in two ways:
- User data using the CRCDAT registers
- Flash using the Program Memory Scanner
To set the number of bits of data, up to 16 bits, the
DLEN bits of CRCCON1 must be set accordingly. Only
data bits in CRCDATA registers up to DLEN will be
used, other data bits in CRCDATA registers will be
ignored.
Data is moved into the CRCSHIFT as an intermediate
to calculate the check value located in the CRCACC
registers.
The SHIFTM bit is used to determine the bit order of the
data being shifted into the accumulator. If SHIFTM is
not set, the data will be shifted in MSb first. The value
of DLEN will determine the MSb. If SHIFTM bit is set,
the data will be shifted into the accumulator in reversed
order, LSb first.
The CRC module can be seeded with an initial value by
setting the CRCACC<15:0> registers to the
appropriate value before beginning the CRC.
11.4.1 CRC FROM USER DATA
To use the CRC module on data input from the user, the
user must write the data to the CRCDAT registers. The
data from the CRCDAT registers will be latched into the
shift registers on any write to the CRCDATL register.
11.4.2 CRC FROM FLASH
To use the CRC module on data located in Flash
memory, the user can initialize the Program Memory
Scanner as defined in Section 11.8, Program Mem-
ory Scan Configuration.
11.5 CRC Check Value
The CRC check value will be located in the CRCACC
registers after the CRC calculation has finished. The
check value will depend on two mode settings of the
CRCCON: ACCM and SHIFTM.
If the ACCM bit is set, the CRC module will augment
the data with a number of zeros equal to the length of
the polynomial to find the final check value. If the
ACCM bit is not set, the CRC will stop at the end of the
data. A number of zeros equal to the length of the poly-
nomial can then be entered to find the same check
value as augmented mode, alternatively the expected
check value can be entered at this point to make the
final result equal to 0.
A final XOR value may be needed with the check value
to find the desired CRC result
11.6 CRC Interrupt
The CRC will generate an interrupt when the BUSY bit
transitions from ‘1’ to ‘0’. The CRCIF interrupt flag bit of
the PIR6 register is set every time the BUSY bit transi-
tions, regardless of whether or not the CRC interrupt is
enabled. The CRCIF bit can only be cleared in soft-
ware. The CRC interrupt enable is the CRCIE bit of the
PIE6 register.
 2016 Microchip Technology Inc.
Preliminary
DS40001824A-page 187