PIC16LF18854 Datasheet, PDF (213/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
REGISTER 12-18: SLRCONB: PORTB SLEW RATE CONTROL REGISTER
R/W-1/1
SLRB7
bit 7
R/W-1/1
SLRB6
R/W-1/1
SLRB5
R/W-1/1
SLRB4
R/W-1/1
SLRB3
R/W-1/1
SLRB2
R/W-1/1
SLRB1
R/W-1/1
SLRB0
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-0
SLRB<7:0>: PORTB Slew Rate Enable bits
For RB<7:0> pins, respectively
1 = Port pin slew rate is limited
0 = Port pin slews at maximum rate
REGISTER 12-19: INLVLB: PORTB INPUT LEVEL CONTROL REGISTER
R/W-1/1
INLVLB7
bit 7
R/W-1/1
INLVLB6
R/W-1/1
INLVLB5
R/W-1/1
INLVLB4
R/W-1/1
INLVLB3
R/W-1/1
INLVLB2
R/W-1/1
INLVLB1
R/W-1/1
INLVLB0
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-0
INLVLB<7:0>: PORTB Input Level Select bits
For RB<7:0> pins, respectively
1 = ST input used for PORT reads and interrupt-on-change
0 = TTL input used for PORT reads and interrupt-on-change
 2016 Microchip Technology Inc.
Preliminary
DS40001824A-page 213