PIC16LF18854 Datasheet, PDF (312/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
REGISTER 20-8: CWGxCLK: CWGx CLOCK SELECTION REGISTER
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
bit 7
U-0
R/W-0/0
—
CS
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
q = Value depends on condition
bit 7-1
bit 0
Unimplemented: Read as ‘0’
CS: CWGx Clock Selection bit
1 = HFINTOSC 16 MHz is selected
0 = FOSC is selected
REGISTER 20-9: CWGxISM: CWGx INPUT SELECTION REGISTER
U-0
—
bit 7
U-0
U-0
U-0
R/W-0/0
R/W-0/0
R/W-0/0
—
—
—
IS<3:0>
R/W-0/0
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
q = Value depends on condition
bit 7-4
bit 3-0
Unimplemented: Read as ‘0’
IS<3:0>: CWGx Input Selection bits
1111 = Reserved. No channel connected.
•
•
•
1011 = Reserved. No channel connected.
1010 = PWM4_out
1001 = PWM3_out
1000 = Reserved. No channel connected.
0111 = Reserved. No channel connected.
0110 = LC2_out
0101 = LC1_out
0100 = CCP4_out
0011 = CCP3_out
0010 = CCP2_out
0001 = CCP1_out
0000 = CWGx1CLK
DS40001824A-page 312
Preliminary
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