PIC16LF18854 Datasheet, PDF (54/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

TABLE 3-13: SPECIAL FUNCTION REGISTER SUMMARY BANKS 0-31 (CONTINUED)
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bank 3
CPU CORE REGISTERS; see Table 3-2 for specifics
18Ch
18Dh
18Eh
18Fh
190h
191h
192h
193h
194h
195h
196h
197h
198h
199h
19Ah
19Bh
19Ch
19Dh
19Eh
19Fh
Legend:
Note 1:
2:
SSP1BUF
SSPBUF<7:0>
SSP1ADD
SSPADD<7:0>
SSP1MSK
SSPMSK<7:0>
SSP1STAT
SMP
CKE
D/A
P
S
R/W
UA
SSP1CON1
WCOL
SSPOV
SSPEN
CKP
SSPM<3:0>
SSP1CON2
GCEN
ACKSTAT
ACKDT
ACKEN
RCEN
PEN
RSEN
SSP1CON3
ACKTIM
PCIE
SCIE
BOEN
SDAHT
SBCDE
AHEN
—
—
Unimplemented
—
—
Unimplemented
—
—
Unimplemented
SSP2BUF
SSPBUF<7:0>
SSP2ADD
SSPADD<7:0>
SSP2MSK
SSPMSK<7:0>
SSP2STAT
SMP
CKE
D/A
P
S
R/W
UA
SSP2CON1
WCOL
SSPOV
SSPEN
CKP
SSPM<3:0>
SSP2CON2
GCEN
ACKSTAT
ACKDT
ACKEN
RCEN
PEN
RSEN
SSP2CON3
ACKTIM
PCIE
SCIE
BOEN
SDAHT
SBCDE
AHEN
—
—
Unimplemented
—
—
Unimplemented
—
—
Unimplemented
x = unknown, u = unchanged, q =depends on condition, - = unimplemented, read as ‘0’, r = reserved. Shaded locations unimplemented, read as ‘0’.
Register present on PIC16F18855/75 devices only.
Unimplemented, read as ‘1’.
BF
SEN
DHEN
BF
SEN
DHEN
Value on:
POR, BOR
Value on all
other Resets
xxxx xxxx
0000 0000
1111 1111
0000 0000
0000 0000
0000 0000
0000 0000
—
—
—
xxxx xxxx
0000 0000
1111 1111
0000 0000
0000 0000
0000 0000
0000 0000
—
—
—
xxxx xxxx
0000 0000
1111 1111
0000 0000
0000 0000
0000 0000
0000 0000
—
—
—
xxxx xxxx
0000 0000
1111 1111
0000 0000
0000 0000
0000 0000
0000 0000
—
—
—