PIC16LF18854 Datasheet, PDF (238/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
REGISTER 12-51: SLRCONE: PORTE SLEW RATE CONTROL REGISTER
U-0
U-0
U-0
U-0
U-0
R/W-1/1
—
—
—
—
—
SLRE2
bit 7
R/W-1/1
SLRE1
R/W-1/1
SLRE0
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-3
bit 2-0
Unimplemented: Read as ‘0’
SLRE<2:0>: PORTE Slew Rate Enable bits
For RE<2:0> pins, respectively
1 = Port pin slew rate is limited
0 = Port pin slews at maximum rate
REGISTER 12-52: INLVLE: PORTE INPUT LEVEL CONTROL REGISTER
U-0
U-0
U-0
U-0
R/W-1/1
R/W-1/1
—
—
—
—
INLVLE3
INLVLE2
bit 7
R/W-1/1
INLVLE1
R/W-1/1
INLVLE0
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-4
bit 3-0
Unimplemented: Read as ‘0’
INLVLE<3:0>: PORTE Input Level Select bits
For RE<3:0> pins, respectively
1 = ST input used for PORT reads and interrupt-on-change
0 = TTL input used for PORT reads and interrupt-on-change
DS40001824A-page 238
Preliminary
 2016 Microchip Technology Inc.