PIC16LF18854 Datasheet, PDF (291/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

FIGURE 20-1:
SIMPLIFIED CWG BLOCK DIAGRAM (HALF-BRIDGE MODE)
See
CWGxISM
Register
CWGxISM<3:0>
D
Q
ERQ
EN
SHUTDOWN
HFINTOSC
1
FOSC
0
CWGxCLK<0>
CWG_data
Rising Deadband Block
clock
signal_out
signal_in
CWG_dataA
CWG_dataC
Falling Deadband Block
clock
signal_out
signal_in
CWG_dataB
CWG_dataD
Rev. 10-000166B
8/29/2014