PIC16LF18854 Datasheet, PDF (231/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
12.13 Register Definitions: PORTE (PIC16(L)F18856)
REGISTER 12-42: PORTE: PORTE REGISTER
U-0
—
bit 7
U-0
U-0
U-0
R-x/u
U-0
—
—
—
RE3
—
U-0
U-0
—
—
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-4
bit 3
bit 2-0
Unimplemented: Read as ‘0’
RE<3>: PORTE Input Pin bit
1 = Port pin is > VIH
0 = Port pin is < VIL
Unimplemented: Read as ‘0’
REGISTER 12-43: WPUE: WEAK PULL-UP PORTE REGISTER
U-0
—
bit 7
U-0
U-0
U-0
R/W-1/1
U-0
—
—
—
WPUE3
—
U-0
U-0
—
—
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-4
bit 3
bit 2-0
Unimplemented: Read as ‘0’
WPUE3: Weak Pull-up Register bit
1 = Pull-up enabled
0 = Pull-up disabled
Unimplemented: Read as ‘0’
Note 1: Global WPUEN bit of the OPTION_REG register must be cleared for individual pull-ups to be enabled.
2: The weak pull-up device is automatically disabled if the pin is configured as an output.
 2016 Microchip Technology Inc.
Preliminary
DS40001824A-page 231