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| PIC16LF18854 Datasheet, PDF (584/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture | |||
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PIC16(L)F18856/76
FIGURE 34-1:
CLOCK REFERENCE BLOCK DIAGRAM
Rev. 10-000261A
9/10/2015
See
CLKRCLK
Register
CLKREN
CLKRCLK<3:0>
CLKREN
FREEZE ENABLED(1)
ICD FREEZE MODE(1)
CLKRDIV<2:0>
Counter Reset
128 111
64 110 CLKRDC<1:0>
32 101
16 100
8 011
Duty Cycle
CLKR
PPS
4 010
2 001
To Peripherals
D
Q
000
EN
FIGURE 34-2:
CLOCK REFERENCE TIMING
FOSC
P1
P2
CLKREN
CLKR Output
CLKRDIV[2:0] = 001
CLKRDC[1:0] = 10
Duty Cycle
(50%)
CLKR Output
FOSC / 2
CLKRDIV[2:0] = 001
CLKRDC[1:0] = 01
Duty Cycle (25%)
DS40001824A-page 584
Preliminary
ï£ 2016 Microchip Technology Inc.
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