PIC16LF18854 Datasheet, PDF (352/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
FIGURE 23-11: COMPUTATIONAL FEATURES SIMPLIFIED BLOCK DIAGRAM
ADCALC<2:0>
Rev. 10-000260A
7/28/2015
ADRES
ADFILT
Average/
Filter
ADPSIS
1
ADPREV
0
ADSTPT
The operation of the ADC computational features is
controlled by the ADMD <2:0> bits in the ADCON2
register.
The module can be operated in one of five modes:
• Basic: This is a legacy mode. In this mode, ADC
conversion occurs on single (ADDSEN=0) or double
(ADDSEN=1) samples. ADIF is set after each
conversion completes.
• Accumulate: With each trigger, the ADC conversion
result is added to accumulator and ADCNT increments.
ADIF is set after each conversion. ADTIF is set accord-
ing to the Calculation mode.
• Average: With each trigger, the ADC conversion
result is added to the accumulator. When the ADRPT
number of samples have been accumulated, a
threshold test is performed. Upon the next trigger, the
counter is reset to ‘1’ and the accumulator is replaced
with the first ADC conversion cleared. For the
subsequent threshold tests, additional ADRPT
samples are required to be accumulated.
• Burst Average: At the trigger, the accumulator and
counter are cleared. The ADC conversion results are
then collected repetitively until ADRPT samples are
accumulated and finally the threshold is tested.
• Low-Pass Filter (LPF): With each trigger, the ADC
conversion result is sent through a filter. When ADRPT
samples have occurred, a threshold test is performed.
Every trigger after that the ADC conversion result is
sent through the filter and another threshold test is
performed.
The five modes are summarized in Table 23-3 below.
ADTMOD<2:0>
Error
Calculation
ADERR
Threshold
Logic
Set
Interrupt
Flag
ADUTHR ADLTHR
DS40001824A-page 352
Preliminary
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