PIC16LF18854 Datasheet, PDF (9/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

TABLE 2: 28-PIN ALLOCATION TABLE (PIC16(L)F18856) (CONTINUED)
RB5 26 23 ANB5
—
—
—
—
—
—
RB6 27 24 ANB6
—
—
—
—
—
—
RB7 28 25 ANB7
—
DAC1OUT2
—
—
—
—
RC0 11 8
ANC0
—
—
—
—
—
—
RC1 12 9
ANC1
—
—
—
—
—
—
RC2 13 10 ANC2
—
—
—
—
—
—
RC3 14 11 ANC3
—
—
—
—
SCL1^(3,4)
—
SCK1⁽¹⁾
RC4 15 12 ANC4
—
—
—
—
SDA1^(3,4)
—
SDI1⁽¹⁾
RC5 16 13 ANC5
—
—
—
—
—
—
—
T1G⁽¹⁾
CCP3⁽¹⁾
SMTSIG2⁽¹⁾
—
—
—
—
T6IN⁽¹⁾
—
—
T1CKI⁽¹⁾
—
T3CKI⁽¹⁾
T3G⁽¹⁾
SMTWIN1⁽¹⁾
—
SMTSIG1⁽¹⁾ CCP2⁽¹⁾
—
T5CKI⁽¹⁾
CCP1⁽¹⁾
—
T2IN⁽¹⁾
—
—
—
—
—
T4IN⁽¹⁾
—
—
—
—
— IOCB5
—
—
CLCIN2⁽¹⁾ —
— IOCB6 ICSPCLK
—
CLCIN3⁽¹⁾ —
— IOCB7 ICSPDAT
—
—
—
— IOCC0 SOSCO
—
—
—
— IOCC1 SOSCI
—
—
—
— IOCC2
—
—
—
—
— IOCC3
—
—
—
—
— IOCC4
—
—
—
—
— IOCC5
—
RC6 17 14 ANC6
—
—
—
—
—
CK(3)
—
—
—
—
—
—
— IOCC6
—
RC7 18 15 ANC7
—
—
—
—
—
RX⁽¹⁾
—
—
—
—
—
—
— IOCC7
—
DT⁽³⁾
RE3 1 26
—
—
—
—
—
—
—
—
—
—
—
—
—
— IOCE3 MCLR
VPP
VDD
20 17
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
VSS
Note
8, 5,
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
19 16
1: This is a PPS remappable input signal. The input function may be moved from the default location shown to one of several other PORTX pins. Refer to Table 13-1 for details on which port pins may be
used for this signal.
2: All output signals shown in this row are PPS remappable. These signals may be mapped to output onto one of several PORTX pin options as described in Table 13-3.
3: This is a bidirectional signal. For normal module operation, the firmware should map this signal to the same pin in both the PPS input and PPS output registers.
4: These pins are configured for I²C logic levels.; The SCLx/SDAx signals may be assigned to any of the RB1/RB2/RC3/RC4 pins. PPS assignments to the other pins (e.g., RA5) will operate, but input
logic levels will be standard TTL/ST, as selected by the INLVL register, instead of the I²C specific or SMbus input buffer thresholds.