PIC16LF18854 Datasheet, PDF (318/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
The pull-up and pull-down resistor values are
significantly affected by small variations of VCPINV.
Measuring VCPINV can be difficult, especially when the
waveform is relative to VDD. However, by combining
Equations 21-2 and 21-3, the resistor value can be
determined from the time difference between the
ZCDx_output high and low periods. Note that the time
difference, ∆T, is 4*TOFFSET. The equation for
determining the pull-up and pull-down resistor values
from the high and low ZCDx_output periods is shown in
Equation 21-4. The ZCDx_output signal can be directly
observed on the ZCDxOUT pin by setting the EN bit.
EQUATION 21-4:


R
=
R
SER
I
ES


--------------------------^V----^B---^I--^A---^S--------------------------
–

1


V
P
E
A
K_
sin


F
re
q
_---_--2--T_----




R is pull-up or pull-down resistor.
VBIAS is VPULLUP when R is pull-up or VDD when R
is pull-down.
∆T is the ZCDxOUT high and low period difference.
21.6 Handling VPEAK variations
If the peak amplitude of the external voltage is
expected to vary, the series resistor must be selected
to keep the ZCD current source and sink below the
design maximum range of ± 600 A and above a
reasonable minimum range. A general rule of thumb is
that the maximum peak voltage can be no more than
six times the minimum peak voltage. To ensure that the
maximum current does not exceed ± 600 A and the
minimum is at least ± 100 A, compute the series
resistance as shown in Equation 21-5. The
compensating pull-up for this series resistance can be
determined with Equation 21-3 because the pull-up
value is independent from the peak voltage.
EQUATION 21-5: SERIES R FOR V RANGE
RSERIES = -^V----^M----^A---^X---^P---^E---7^A---^K_---1-+--0---^V_–---₄-^M----^I--^N---^P---^E---^A---^K--
21.7 Operation During Sleep
The ZCD current sources and interrupts are unaffected
by Sleep.
21.8 Effects of a Reset
The ZCD circuit can be configured to default to the active
or inactive state on Power-On-Reset (POR). When the
ZCDDIS Configuration bit is cleared, the ZCD circuit will
be active at POR. When the ZCD Configuration bit is set,
the EN bit of the ZCDxCON register must be set to
enable the ZCD module.
DS40001824A-page 318
Preliminary
 2016 Microchip Technology Inc.