PIC16LF18854 Datasheet, PDF (22/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
TABLE 1-2: PIC16F18856 PINOUT DESCRIPTION (CONTINUED)
Name
RB7/ANB7/DAC1OUT2/T6IN⁽¹⁾/
CLCIN3⁽¹⁾/IOCB7/ICSPDAT
Function
RB7
ANB7
Input
Type
TTL/ST
AN
Output Type
Description
CMOS/OD
—
General purpose I/O.
ADC Channel B7 input.
DAC1OUT2
T6IN⁽¹⁾
CLCIN3⁽¹⁾
—
TTL/ST
TTL/ST
AN
Digital-to-Analog Converter output.
—
Timer6 external digital clock input.
—
Configurable Logic Cell source input.
IOCB7
TTL/ST
—
Interrupt-on-change input.
ICSPDAT
ST
RC0/ANC0/T1CKI(1)/T3CKI⁽¹⁾/T3G⁽¹⁾/
SMTWIN1⁽¹⁾/IOCC0/SOSCO
RC0
ANC0
T1CKI⁽¹⁾
T3CKI⁽¹⁾
T3G⁽¹⁾
SMTWIN1⁽¹⁾
TTL/ST
AN
TTL/ST
TTL/ST
TTL/ST
TTL/ST
CMOS
CMOS/OD
—
—
—
—
—
In-Circuit Serial Programming™ and debugging data input/out-
put.
General purpose I/O.
ADC Channel C0 input.
Timer1 external digital clock input.
Timer3 external digital clock input.
Timer3 gate input.
Signal Measurement Timer1 (SMT1) input.
IOCC0
TTL/ST
—
Interrupt-on-change input.
RC1/ANC1/SMTSIG1⁽¹⁾/CCP2⁽¹⁾/
IOCC1/SOSCI
SOSCO
RC1
ANC1
SMTSIG1⁽¹⁾
CCP2⁽¹⁾
IOCC1
—
TTL/ST
AN
TTL/ST
TTL/ST
AN
CMOS/OD
—
—
CMOS/OD
TTL/ST
—
32.768 kHz secondary oscillator crystal driver output.
General purpose I/O.
ADC Channel C1 input.
Signal Measurement Timer1 (SMT1) signal input.
Capture/compare/PWM2 (default input location for capture
function).
Interrupt-on-change input.
RC2/ANC2/T5CKI⁽¹⁾/CCP1⁽¹⁾/IOCC2
SOSCI
RC2
AN
TTL/ST
—
CMOS/OD
32.768 kHz secondary oscillator crystal driver input.
General purpose I/O.
ANC2
T5CKI⁽¹⁾
CCP1⁽¹⁾
RC3/ANC3/SCL1^(3,4)/SCK1⁽¹⁾/T2IN⁽¹⁾/
IOCC3
IOCC2
RC3
ANC3
SCL1^(3,4)
SCK1⁽¹⁾
T2IN⁽¹⁾
AN
TTL/ST
TTL/ST
TTL/ST
TTL/ST
AN
I²C/
SMBus
TTL/ST
TTL/ST
—
—
CMOS/OD
—
CMOS/OD
—
OD
ADC Channel C2 input.
Timer5 external digital clock input.
Capture/compare/PWM1 (default input location for capture
function).
Interrupt-on-change input.
General purpose I/O.
ADC Channel C3 input.
MSSP1 I²C clock input/output.
CMOS/OD
—
MSSP1 SPI clock input/output (default input location, SCK1 is a
PPS remappable input and output).
Timer2 external input.
IOCC3
TTL/ST
—
Interrupt-on-change input.
Legend: AN = Analog input or output
TTL = TTL compatible input
CMOS = CMOS compatible input or output
ST
= Schmitt Trigger input with CMOS levels
OD = Open-Drain
I²C = Schmitt Trigger input with I²C
HV = High Voltage
XTAL = Crystal levels
Note 1: This is a PPS remappable input signal. The input function may be moved from the default location shown to one of several other PORTx
pins. Refer to Table 13-1 for details on which PORT pins may be used for this signal.
2: All output signals shown in this row are PPS remappable. These signals may be mapped to output onto one of several PORTx pin options
as described in Table 13-3.
3: This is a bidirectional signal. For normal module operation, the firmware should map this signal to the same pin in both the PPS input and
PPS output registers.
4: These pins are configured for I²C logic levels. The SCLx/SDAx signals may be assigned to any of the RB1/RB2/RC3/RC4 pins. PPS
assignments to the other pins (e.g., RA5) will operate, but input logic levels will be standard TTL/ST, as selected by the INLVL register,
instead of the I²C specific or SMBus input buffer thresholds.
DS40001824A-page 22
Preliminary
 2016 Microchip Technology Inc.