PIC16LF18854 Datasheet, PDF (60/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

TABLE 3-13: SPECIAL FUNCTION REGISTER SUMMARY BANKS 0-31 (CONTINUED)
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bank 9
CPU CORE REGISTERS; see Table 3-2 for specifics
48Ch
SMT1TMRL
TMR<7:0>
48Dh
SMT1TMRH
TMR<15:8>
48Eh
SMT1TMRU
TMR<23:16>
48Fh
SMT1CPRL
CPR<7:0>
490h
SMT1CPRH
CPR<15:8>
491h
SMT1CPRU
CPR<23:16>
492h
SMT1CPWL
CPW<7:0>
493h
SMT1CPWH
CPW<15:8>
494h
SMT1CPWU
CPW<23:16>
495h
SMT1PRL
PR<7:0>
496h
SMT1PRH
PR<15:8>
497h
SMT1PRU
PR<23:16>
498h
SMT1CON0
EN
—
STP
WPOL
SPOL
CPOL
SMT1PS<1:0>
499h
SMT1CON1
SMT1GO
REPEAT
—
—
MODE<3:0>
49Ah
SMT1STAT
CPRUP
CPWUP
RST
—
—
TS
WS
AS
49Bh
SMT1CLK
—
—
—
—
—
CSEL<2:0>
49Ch
SMT1SIG
—
—
—
SSEL<4:0>
49Dh
SMT1WIN
—
—
—
WSEL<4:0>
49Eh
—
—
Unimplemented
49Fh
—
—
Unimplemented
Legend:
Note 1:
2:
x = unknown, u = unchanged, q =depends on condition, - = unimplemented, read as ‘0’, r = reserved. Shaded locations unimplemented, read as ‘0’.
Register present on PIC16F18855/75 devices only.
Unimplemented, read as ‘1’.
Value on:
POR, BOR
Value on all
other Resets
0000 0000
0000 0000
0000 0000
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
1111 1111
1111 1111
1111 1111
0-00 0000
00-- 0000
000- -000
---- -000
---0 0000
---0 0000
—
—
0000 0000
0000 0000
0000 0000
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
1111 1111
1111 1111
1111 1111
0-00 0000
00-- 0000
000- -000
---- -000
---0 0000
---0 0000
—
—