PIC16LF18854 Datasheet, PDF (179/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
10.4.7
NVMREG DATA EEPROM MEMORY,
USER ID, DEVICE ID AND
CONFIGURATION WORD ACCESS
Instead of accessing Program Flash Memory (PFM),
the Data EEPROM Memory, the User ID’s, Device ID/
Revision ID and Configuration Words can be accessed
when NVMREGS = 1 in the NVMCON1 register. This is
the region that would be pointed to by PC<15> = 1, but
not all addresses are accessible. Different access may
exist for reads and writes. Refer to Table 10-3.
When read access is initiated on an address outside
the parameters listed in Table 10-3, the NVMDATH:
NVMDATL register pair is cleared, reading back ‘0’s.
FIGURE 10-7:
FLASH PROGRAM
MEMORY MODIFY
FLOWCHART
Rev. 10-000051C
8/21/2015
Start
Verify Operation
This routine assumes that the last
row of data written was from an
image saved on RAM. This image
will be used to verify the data
currently stored in Flash Program
Memory
Read Operation
(See Note 1)
PMDAT =
No
RAM image ?
Yes
Fail
Verify Operation
No
Last word ?
Yes
End
Verify Operation
Note 1: See Figure 10-1.
TABLE 10-3: EEPROM, USER ID, DEV/REV ID AND CONFIGURATION WORD ACCESS
(NVMREGS = 1)
Address
Function
Read Access
Write Access
8000h-8003h
User IDs
Yes
Yes
8005h-8006h
Device ID/Revision ID
Yes
No
8007h-800Bh
Configuration Words 1-5
Yes
No
F000h-F0FFh
EEPROM
Yes
Yes
 2016 Microchip Technology Inc.
Preliminary
DS40001824A-page 179