PIC16LF18854 Datasheet, PDF (619/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
TABLE 37-11: RESET, WDT, OSCILLATOR START-UP TIMER, POWER-UP TIMER, BROWN-OUT
RESET AND LOW-POWER BROWN-OUT RESET SPECIFICATIONS
Standard Operating Conditions (unless otherwise stated)
Param.
No.
Sym.
Characteristic
Min. Typ† Max. Units
Conditions
RST01* TMCLR MCLR Pulse Width Low to ensure Reset
2
—
—
s
RST02* TIOZ
I/O high-impedance from Reset detection —
—
2
s
RST03 TWDT
Watchdog Timer Time-out Period
—
16
—
ms 16 ms Nominal Reset Time
RST04*
RST05
RST06
TPWRT
TOST
VBOR
Power-up Timer Period
Oscillator Start-up Timer Period^(1,2)
Brown-out Reset Voltage⁽⁴⁾
—
65
—
ms
— 1024 — TOSC
2.55 2.70 2.85
2.30 2.45 2.60
1.80 1.90 2.05
V BORV = 0
V BORV = 1 (PIC16F18856/76)
V BORV = 1 (PIC16LF18856/76)
RST07 VBORHYS Brown-out Reset Hysteresis
—
40
—
mV
RST08 TBORDC Brown-out Reset Response Time
—
3
—
s
RST09 VLPBOR Low-Power Brown-out Reset Voltage
2.3 2.45 2.7
V
* These parameters are characterized but not tested.
† Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Note 1: By design, the Oscillator Start-up Timer (OST) counts the first 1024 cycles, independent of frequency.
2: To ensure these voltage tolerances, VDD and VSS must be capacitively decoupled as close to the device as possible.
0.1 F and 0.01 F values in parallel are recommended.
TABLE 37-12: ANALOG-TO-DIGITAL CONVERTER (ADC) ACCURACY SPECIFICATIONS^(1,2):
Operating Conditions (unless otherwise stated)
VDD = 3.0V, TA = 25°C
Param.
No.
Sym.
Characteristic
Min.
Typ†
Max.
Unit
s
Conditions
AD01 NR
Resolution
—
—
10 bit
AD02 EIL
Integral Error
—
±0.1 ±1.0 LSb ADCREF+ = 3.0V, ADCREF-= 0V
AD03 EDL Differential Error
—
±0.1 ±1.0 LSb ADCREF+ = 3.0V, ADCREF-= 0V
AD04 EOFF Offset Error
—
0.5
2.0 LSb ADCREF+ = 3.0V, ADCREF-= 0V
AD05 EGN Gain Error
—
±0.2 ±1.0 LSb ADCREF+ = 3.0V, ADCREF-= 0V
AD06 VADREF ADC Reference Voltage
(ADREF+ - ADREF-)
1.8
—
VDD
V
AD07 VAIN Full-Scale Range
ADREF- — ADREF+ V
AD08 ZAIN
Recommended Impedance of
Analog Voltage Source
—
10
— k
AD09 RVREF ADC Voltage Reference Ladder
Impedance
—
50
— k Note 3
*
†
Note 1:
2:
3:
These parameters are characterized but not tested.
Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Total Absolute Error is the sum of the offset, gain and integral non-linearity (INL) errors.
The ADC conversion result never decreases with an increase in the input and has no missing codes.
This is the impedance seen by the VREF pads when the external reference pads are selected.
 2016 Microchip Technology Inc.
Preliminary
DS40001824A-page 619