PIC16LF18854 Datasheet, PDF (335/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
TABLE 22-4: SUMMARY OF REGISTERS ASSOCIATED WITH CLCx
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register
on Page
INTCON
GIE
PEIE
―
―
―
―
―
INTEDG
132
PIR5
CLC4IF
CLC3IF
CLC2IF
CLC1IF
—
TMR5GIF TMR3GIF TMR1GIF
147
PIE5
CLC4IE
CLC4IE
CLC2IE
CLC1IE
—
TMR5GIE TMR3GIE TMR1GIE
138
CLC1CON
LC1EN
―
LC1OUT LC1INTP LC1INTN
LC1MODE<2:0>
327
CLC1POL
LC1POL
―
―
―
LC1G4POL LC1G3POL LC1G2POL LC1G1POL
328
CLC1SEL0
―
―
LC1D1S<5:0>
329
CLC1SEL1
―
―
LC1D2S<5:0>
329
CLC1SEL2
―
―
LC1D3S<5:0>
329
CLC1SEL3
―
―
LC1D4S<5:0>
329
CLC1GLS0
LC1G1D4T LC1G1D4N LC1G1D3T LC1G1D3N LC1G1D2T LC1G1D2N LC1G1D1T LC1G1D1N
330
CLC1GLS1
LC1G2D4T LC1G2D4N LC1G2D3T LC1G2D3N LC1G2D2T LC1G2D2N LC1G2D1T LC1G2D1N
331
CLC1GLS2
LC1G3D4T LC1G3D4N LC1G3D3T LC1G3D3N LC1G3D2T LC1G3D2N LC1G3D1T LC1G3D1N
332
CLC1GLS3
LC1G4D4T LC1G4D4N LC1G4D3T LC1G4D3N LC1G4D2T LC1G4D2N LC1G4D1T LC1G4D1N
333
CLC2CON
LC2EN
―
LC2OUT LC2INTP LC2INTN
LC2MODE<2:0>
327
CLC2POL
LC2POL
―
―
―
LC2G4POL LC2G3POL LC2G2POL LC2G1POL
328
CLC2SEL0
―
―
LC2D1S<5:0>
329
CLC2SEL1
―
―
LC2D2S<5:0>
329
CLC2SEL2
―
―
LC2D3S<5:0>
329
CLC2SEL3
―
―
LC2D4S<5:0>
329
CLC2GLS0
LC2G1D4T LC2G1D4N LC2G1D3T LC2G1D3N LC2G1D2T LC2G1D2N LC2G1D1T LC2G1D1N
330
CLC2GLS1
LC2G2D4T LC2G2D4N LC2G2D3T LC2G2D3N LC2G2D2T LC2G2D2N LC2G2D1T LC2G2D1N
331
CLC2GLS2
LC2G3D4T LC2G3D4N LC2G3D3T LC2G3D3N LC2G3D2T LC2G3D2N LC2G3D1T LC2G3D1N
332
CLC2GLS3
LC2G4D4T LC2G4D4N LC2G4D3T LC2G4D3N LC2G4D2T LC2G4D2N LC2G4D1T LC2G4D1N
333
CLC3CON
LC3EN
―
LC3OUT LC3INTP LC3INTN
LC3MODE<2:0>
327
CLC3POL
LC3POL
―
―
―
LC3G4POL LC3G3POL LC3G2POL LC3G1POL
328
CLC3SEL0
―
―
LC3D1S<5:0>
329
CLC3SEL1
―
―
LC3D2S<5:0>
329
CLC3SEL2
―
―
LC3D3S<5:0>
329
CLC3SEL3
―
―
LC3D4S<5:0>
329
CLC3GLS0
LC3G1D4T LC3G1D4N LC3G1D3T LC3G1D3N LC3G1D2T LC3G1D2N LC3G1D1T LC3G1D1N
330
CLC3GLS1
LC3G2D4T LC3G2D4N LC3G2D3T LC3G2D3N LC3G2D2T LC3G2D2N LC3G2D1T LC3G2D1N
331
CLC3GLS2
LC3G3D4T LC3G3D4N LC3G3D3T LC3G3D3N LC3G3D2T LC3G3D2N LC3G3D1T LC3G3D1N
332
CLC3GLS3
LC3G4D4T LC3G4D4N LC3G4D3T LC3G4D3N LC3G4D2T LC3G4D2N LC3G4D1T LC3G4D1N
333
CLC4CON
LC4EN
―
LC4OUT LC4INTP LC4INTN
LC4MODE<2:0>
327
CLC4POL
LC4POL
―
―
―
LC4G4POL LC4G3POL LC4G2POL LC4G1POL
328
CLC4SEL0
―
―
LC4D1S<5:0>
329
CLC4SEL1
―
―
LC4D2S<5:0>
329
CLC4SEL2
―
―
LC4D3S<5:0>
329
CLC4SEL3
―
―
LC4D4S<5:0>
329
CLC4GLS0
LC4G1D4T LC4G1D4N LC4G1D3T LC4G1D3N LC4G1D2T LC4G1D2N LC4G1D1T LC4G1D1N
330
Legend: — = unimplemented, read as ‘0’. Shaded cells are unused by the CLCx modules.
 2016 Microchip Technology Inc.
Preliminary
DS40001824A-page 335