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PIC16LF18854 Datasheet, PDF (596/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture
PIC16(L)F18856/76
DECFSZ
Syntax:
Operands:
Operation:
Status Affected:
Description:
Decrement f, Skip if 0
[ label ] DECFSZ f,d
0  f  127
d  [0,1]
(f) - 1  (destination);
skip if result = 0
None
The contents of register ‘f’ are decre-
mented. If ‘d’ is ‘0’, the result is placed
in the W register. If ‘d’ is ‘1’, the result
is placed back in register ‘f’.
If the result is ‘1’, the next instruction is
executed. If the result is ‘0’, then a
NOP is executed instead, making it a
2-cycle instruction.
GOTO
Syntax:
Operands:
Operation:
Status Affected:
Description:
Unconditional Branch
[ label ] GOTO k
0  k  2047
k  PC<10:0>
PCLATH<6:3>  PC<14:11>
None
GOTO is an unconditional branch. The
11-bit immediate value is loaded into
PC bits <10:0>. The upper bits of PC
are loaded from PCLATH<4:3>. GOTO
is a 2-cycle instruction.
INCF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Increment f
[ label ] INCF f,d
0  f  127
d  [0,1]
(f) + 1  (destination)
Z
The contents of register ‘f’ are incre-
mented. If ‘d’ is ‘0’, the result is placed
in the W register. If ‘d’ is ‘1’, the result
is placed back in register ‘f’.
INCFSZ
Syntax:
Operands:
Operation:
Status Affected:
Description:
Increment f, Skip if 0
[ label ] INCFSZ f,d
0  f  127
d  [0,1]
(f) + 1  (destination),
skip if result = 0
None
The contents of register ‘f’ are incre-
mented. If ‘d’ is ‘0’, the result is placed
in the W register. If ‘d’ is ‘1’, the result
is placed back in register ‘f’.
If the result is ‘1’, the next instruction is
executed. If the result is ‘0’, a NOP is
executed instead, making it a 2-cycle
instruction.
IORLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
Inclusive OR literal with W
[ label ] IORLW k
0  k  255
(W) .OR. k  (W)
Z
The contents of the W register are
OR’ed with the 8-bit literal ‘k’. The
result is placed in the W register.
IORWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Inclusive OR W with f
[ label ] IORWF f,d
0  f  127
d  [0,1]
(W) .OR. (f)  (destination)
Z
Inclusive OR the W register with regis-
ter ‘f’. If ‘d’ is ‘0’, the result is placed in
the W register. If ‘d’ is ‘1’, the result is
placed back in register ‘f’.
DS40001824A-page 596
Preliminary
 2016 Microchip Technology Inc.