PIC16LF18854 Datasheet, PDF (83/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

TABLE 3-13: SPECIAL FUNCTION REGISTER SUMMARY BANKS 0-31 (CONTINUED)
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on:
POR, BOR
Value on all
other Resets
Bank 31
CPU CORE REGISTERS; see Table 3-2 for specifics
F8Ch
—
FE3h
—
Unimplemented
FE4h
STATUS_SHAD
—
—
—
—
—
Z_SHAD
DC_SHAD
FE5h
WREG_SHAD
WREG_SHAD
FE6h
BSR_SHAD
—
—
—
BSR_SHAD
FE7h
PCLATH_SHAD
—
PCLATH_SHAD
FE8h
FSR0L_SHAD
FSR0L_SHAD
FE9h
FSR0H_SHAD
FSR0H_SHAD
FEAh
FSR1L_SHAD
FSR1L_SHAD
FEBh
FSR1H_SHAD
FECh
—
— _{Unimplemented}
FEDh
STKPTR
—
—
—
FSR1H_SHAD
STKPTR<4;0>
FEEh
TOSL
TOSL<7:0>
FEFh
TOSH
—
TOSH<6:0>
Legend:
Note 1:
2:
x = unknown, u = unchanged, q =depends on condition, - = unimplemented, read as ‘0’, r = reserved. Shaded locations unimplemented, read as ‘0’.
Register present on PIC16F18855/75 devices only.
Unimplemented, read as ‘1’.
C_SHAD
—
—
---- -xxx
xxxx xxxx
---x xxxx
-xxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
—
---1 1111
xxxx xxxx
-xxx xxxx
---- -uuu
uuuu uuuu
---u uuuu
-uuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
---1 1111
xxxx xxxx
-xxx xxxx