PIC16LF18854 Datasheet, PDF (235/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
12.15 Register Definitions: PORTE (PIC16(L)F18876)
REGISTER 12-45: PORTE: PORTE REGISTER
U-0
—
bit 7
U-0
U-0
U-0
—
—
—
R-x/u
RE3
R-x/u
RE2
R-x/u
RE1
R-x/u
RE0
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-4
bit 3-0
Unimplemented: Read as ‘0’
RE<3:0>: PORTE Input Pin bit
1 = Port pin is > VIH
0 = Port pin is < VIL
Note 1: Read as ‘0’. Writes to RE<2:0> are actually written to the corresponding LATE register. Reads from the
PORTE register is the return of actual I/O pin values.
REGISTER 12-46: TRISE: PORTE TRI-STATE REGISTER
U-0
—
bit 7
U-0
U-0
U-0
U-1⁽¹⁾
—
—
—
—
R/W-x/u
TRISE2
R/W-x/u
TRISE1
R/W-x/u
TRISE0
bit 0
Legend:
R = Readable bit
u = bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-4
bit 3
bit 2-0
Unimplemented: Read as ‘0’
Unimplemented: Read as ‘1’
TRISE<2:0>: TRISE I/O Value bits⁽²⁾
1 = Port pin is > VIH
0 = Port pin is < VIL
Note 1: Unimplemented, read as ‘1’.
 2016 Microchip Technology Inc.
Preliminary
DS40001824A-page 235