PIC16LF18854 Datasheet, PDF (428/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
29.5.2 HARDWARE GATE MODE
The Hardware Gate modes operate the same as the
Software Gate mode except the TMRx_ers external
signal can also gate the timer. When used with the CCP
the gating extends the PWM period. If the timer is
stopped when the PWM output is high then the duty
cycle is also extended.
When MODE<4:0> = 00001 then the timer is stopped
when the external signal is high. When
MODE<4:0> = 00010 then the timer is stopped when
the external signal is low.
Figure 29-5 illustrates the Hardware Gating mode for
MODE<4:0> = 00001 in which a high input level starts
the counter.
FIGURE 29-5:
HARDWARE GATE MODE TIMING DIAGRAM (MODE = 00001)
Rev. 10-000 196B
5/30/201 4
MODE
0b00001
TMRx_clk
TMRx_ers
PRx
5
TMRx
0
1234501
2
34501
TMRx_postscaled
PWM Duty
Cycle
3
PWM Output
DS40001824A-page 428
Preliminary
 2016 Microchip Technology Inc.