PIC16LF18854 Datasheet, PDF (59/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

TABLE 3-13: SPECIAL FUNCTION REGISTER SUMMARY BANKS 0-31 (CONTINUED)
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bank 8
CPU CORE REGISTERS; see Table 3-2 for specifics
40Ch
SCANLADRL
LADR<7:0>
40Dh
SCANLADRH
LADR<15:8>
40Eh
SCANHADRL
HADR<7:0>
40Fh
SCANHADRH
HADR<15:8>
410h
SCANCON0
EN
SCANGO
BUSY
INVALID
INTM
—
MODE<1:0>
411h
SCANTRIG
—
—
—
—
TSEL<3:0>
412h
—
—
Unimplemented
413h
—
—
Unimplemented
414h
—
—
Unimplemented
415h
—
—
Unimplemented
416h
CRCDATL
DATA<7:0>
417h
CRCDATH
DATA<15:8>
418h
CRCACCL
ACC<7:0>
419h
CRCACCH
ACC<15:8>
41Ah
CRCSHIFTL
SHIFT<7:0>
41Bh
CRCSHIFTH
SHIFT<15:8>
41Ch
CRCXORL
X<7:1>
—
41Dh
CRCXORH
X<15:8>
41Eh
CRCCON0
EN
CRCGO
BUSY
ACCM
—
—
SHIFTM
FULL
41Fh
CRCCON1
DLEN<3:0>
PLEN<3:0>
Legend:
Note 1:
2:
x = unknown, u = unchanged, q =depends on condition, - = unimplemented, read as ‘0’, r = reserved. Shaded locations unimplemented, read as ‘0’.
Register present on PIC16F18855/75 devices only.
Unimplemented, read as ‘1’.
Value on:
POR, BOR
Value on all
other Resets
0000 0000
0000 0000
1111 1111
1111 1111
0000 0-00
---- 0000
—
—
—
—
xxxx xxxx
xxxx xxxx
0000 0000
0000 0000
0000 0000
0000 0000
xxxx xxx-
xxxx xxxx
0000 --00
0000 0000
0000 0000
0000 0000
1111 1111
1111 1111
0000 0-00
---- 0000
—
—
—
—
xxxx xxxx
xxxx xxxx
0000 0000
0000 0000
0000 0000
0000 0000
xxxx xxx-
xxxx xxxx
0000 --00
0000 0000