PIC16LF18854 Datasheet, PDF (67/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

TABLE 3-13: SPECIAL FUNCTION REGISTER SUMMARY BANKS 0-31 (CONTINUED)
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on:
POR, BOR
Value on all
other Resets
Banks 16
CPU CORE REGISTERS; see Table 3-2 for specifics
80Ch
WDTCON0
—
—
PS<4:0>
SEN
80Dh
WDTCON1
—
WDTCS<2:0>
—
WINDOW<2:0>
80Eh
WDTPSL
PSCNT<7:0>
80Fh
WDTPSH
PSCNT<7:0>
810h
WDTTMR
—
WDTTMR<3:0>
STATE
PSCNT<17:16>
811h
BORCON
SBOREN
—
—
—
—
812h
VREGCON⁽¹⁾
—
—
—
—
—
—
—
BORRDY
—
VREGPM
Reserved
813h
PCON0
STKOVF
STKUNF
WDTWV
RWDT
RMCLR
RI
POR
BOR
814h
CCDCON
CCDEN
—
—
—
—
—
CCDS<1:0>
815h
—
—
Unimplemented
816h
—
—
Unimplemented
817h
—
—
Unimplemented
818h
—
—
Unimplemented
819h
—
—
Unimplemented
81Ah
81Bh
NVMADRL
NVMADRH
—⁽²⁾
NVMADR<7:0>
NVMADR<14:8>
81Ch
NVMDATL
NVMDAT<7:0>
81Dh
NVMDATH
—
—
NVMDAT<13:8>
81Eh
NVMCON1
—
NVMREGS
LWLO
FREE
WRERR
WREN
WR
RD
81Fh
NVMCON2
NVMCON2<7:0>
Legend:
Note 1:
2:
x = unknown, u = unchanged, q =depends on condition, - = unimplemented, read as ‘0’, r = reserved. Shaded locations unimplemented, read as ‘0’.
Register present on PIC16F18855/75 devices only.
Unimplemented, read as ‘1’.
--qq qqq0
-qqq -qqq
0000 0000
0000 0000
-000 0000
1--- ---q
---- --01
0011 11qq
0--- --xx
—
—
—
—
—
0000 0000
1000 0000
0000 0000
--00 0000
-000 x000
0000 0000
--qq qqq0
-qqq -qqq
0000 0000
0000 0000
-000 0000
u--- ---u
---- --01
qqqq qquu
0--- --uu
—
—
—
—
—
0000 0000
1000 0000
0000 0000
--00 0000
-000 q000
0000 0000