PIC16LF18854 Datasheet, PDF (349/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
23.4.1 CVD OPERATION
A CVD operation begins with the ADC’s internal
sample and hold capacitor (C_HOLD) being
disconnected from the path which connects it to the
external capacitive sensor node. While disconnected,
C_HOLD is precharged to VDD or VSS, while the path to
the sensor node is also discharged to VDD or VSS.
Typically, this node is discharged to the level opposite
that of CHOLD. When the precharge phase is complete,
the VDD/VSS bias paths for the two nodes are shut off
and CHOLD and the path to the external sensor node
are reconnected, at which time the acquisition phase of
the CVD operation begins. During acquisition, a
capacitive voltage divider is formed between the
precharged CHOLD and sensor nodes, which results in
a final voltage level setting on CHOLD, which is
determined by the capacitances and precharge levels
of the two nodes. After acquisition, the ADC converts
the voltage level on CHOLD. This process is then
repeated with the selected precharge levels for both
the CHOLD and the inverted sensor nodes. Figure 23-7
shows the waveform for two inverted CVD
measurements, which is known as differential CVD
measurement.
FIGURE 23-7:
DIFFERENTIAL CVD MEASUREMENT WAVEFORM
Precharge
V_DD
Acquisition
Conversion
Precharge Acquisition
Conversion
V_SS
First Sample
Time
Second Sample
 2016 Microchip Technology Inc.
Preliminary
DS40001824A-page 349