PIC16LF18854 Datasheet, PDF (437/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

FIGURE 29-12: RISING EDGE-TRIGGERED MONOSTABLE MODE TIMING DIAGRAM (MODE = 10001)
MODE
0b10001
TMRx_clk
PRx
Instruction⁽¹⁾
BSF
5
BCF
BSF
ON
TMRx_ers
TMRx
0
12345
0
12345
0
TMRx_postscaled
Rev. 10-000203A
5/29/2014
BCF
BSF
123 4 5 0
PWM Duty
Cycle
3
PWM Output
Note 1: BSF and BCF represent Bit-Set File and Bit-Clear File instructions executed by the CPU to
set or clear the ON bit of TxCON. CPU execution is asynchronous to the timer clock input.