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PIC16LF18854 Datasheet, PDF (597/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture | |||
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PIC16(L)F18856/76
LSLF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Logical Left Shift
[ label ] LSLF f {,d}
0 ï£ f ï£ 127
d ïï [0,1]
(f<7>) ï® C
(f<6:0>) ï® dest<7:1>
0 ï® dest<0>
C, Z
The contents of register âfâ are shifted
one bit to the left through the Carry flag.
A â0â is shifted into the LSb. If âdâ is â0â,
the result is placed in W. If âdâ is â1â, the
result is stored back in register âfâ.
C
register f
0
LSRF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Logical Right Shift
[ label ] LSRF f {,d}
0 ï£ f ï£ 127
d ïï [0,1]
0 ï® dest<7>
(f<7:1>) ï® dest<6:0>,
(f<0>) ï® C,
C, Z
The contents of register âfâ are shifted
one bit to the right through the Carry
flag. A â0â is shifted into the MSb. If âdâ is
â0â, the result is placed in W. If âdâ is â1â,
the result is stored back in register âfâ.
0
register f
C
MOVF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Words:
Cycles:
Example:
Move f
[ label ] MOVF f,d
0 ï£ f ï£ 127
d ï [0,1]
(f) ï® (dest)
Z
The contents of register f is moved to
a destination dependent upon the
status of d. If d = 0, destination is W
register. If d = 1, the destination is file
register f itself. d = 1 is useful to test a
file register since status flag Z is
affected.
1
1
MOVF FSR, 0
After Instruction
W = value in FSR register
Z =1
ï£ 2016 Microchip Technology Inc.
Preliminary
DS40001824A-page 597
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