PIC16LF18854 Datasheet, PDF (56/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

TABLE 3-13: SPECIAL FUNCTION REGISTER SUMMARY BANKS 0-31 (CONTINUED)
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bank 5
CPU CORE REGISTERS; see Table 3-2 for specifics
28Ch
T2TMR
Holding Register for the 8-bit TMR2 Register
28Dh
T2PR
TMR2 Period Register
28Eh
T2CON
ON
CKPS<2:0>
OUTPS<3:0>
28Fh
T2HLT
PSYNC
CKPOL
CKSYNC
—
MODE
290h
T2CLKCON
—
—
—
—
—
CS<2:0>
291h
T2RST
—
—
—
RSEL<4:0>
292h
T4TMR
Holding Register for the 8-bit TMR4 Register
293h
T4PR
TMR4 Period Register
294h
T4CON
ON
CKPS<2:0>
OUTPS<3:0>
295h
T4HLT
PSYNC
CKPOL
CKSYNC
—
MODE<3:0>
296h
T4CLKCON
—
—
—
—
—
CS<2:0>
297h
T4RST
—
—
—
RSEL<4:0>
298h
T6TMR
Holding Register for the 8-bit TMR6 Register
299h
T6PR
TMR6 Period Register
29Ah
T6CON
ON
CKPS<2:0>
OUTPS<3:0>
29Bh
T6HLT
PSYNC
CKPOL
CKSYNC
—
MODE<3:0>
29Ch
T6CLKCON
—
—
—
—
—
CS<2:0>
29Dh
T6RST
—
—
—
RSEL<4:0>
29Eh
—
—
Unimplemented
29Fh
—
—
Unimplemented
Legend:
Note 1:
2:
x = unknown, u = unchanged, q =depends on condition, - = unimplemented, read as ‘0’, r = reserved. Shaded locations unimplemented, read as ‘0’.
Register present on PIC16F18855/75 devices only.
Unimplemented, read as ‘1’.
Value on:
POR, BOR
Value on all
other Resets
0000 0000
1111 1111
0000 0000
000- 0000
---- -000
---0 0000
0000 0000
1111 1111
0000 0000
000- 0000
---- -000
---0 0000
0000 0000
1111 1111
0000 0000
000- 0000
---- -000
---0 0000
—
—
0000 0000
1111 1111
0000 0000
000- 0000
---- -000
---0 0000
0000 0000
1111 1111
0000 0000
000- 0000
---- -000
---0 0000
0000 0000
1111 1111
0000 0000
000- 0000
---- -000
---0 0000
—
—