PIC16LF18854 Datasheet, PDF (627/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
FIGURE 37-17: SPI MASTER MODE TIMING (CKE = 0, SMP = 0)
SS
SCK
(CKP = 0)
SCK
(CKP = 1)
SP81
SP71 SP72
SP78
SDO
SP80
MSb
SP79
bit 6 - - - - - -1
SP75, SP76
SDI
MSb In
bit 6 - - - -1
SP73
SP74
Note: Refer to Figure 37-4 for load conditions.
SP79
SP78
LSb
LSb In
FIGURE 37-18: SPI MASTER MODE TIMING (CKE = 1, SMP = 1)
SS
SCK
(CKP = 0)
SCK
(CKP = 1)
SP81
SP71
SP73
SP72
SP80
SDO
MSb
bit 6 - - - - - -1
SP75, SP76
SDI
MSb In
bit 6 - - - -1
SP74
Note: Refer to Figure 37-4 for load conditions.
SP79
SP78
LSb
LSb In
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Preliminary
DS40001824A-page 627