PIC16LF18854 Datasheet, PDF (103/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
5.3 Register Definitions: Brown-out Reset Control
REGISTER 5-1: BORCON: BROWN-OUT RESET CONTROL REGISTER
R/W-1/u
U-0
U-0
U-0
U-0
U-0
U-0
SBOREN⁽¹⁾
—
—
—
—
—
—
bit 7
R-q/u
BORRDY
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
q = Value depends on condition
bit 7
bit 6-1
bit 0
SBOREN: Software Brown-out Reset Enable bit⁽¹⁾
If BOREN <1:0> in Configuration Words  01:
SBOREN is read/write, but has no effect on the BOR.
If BOREN <1:0> in Configuration Words = 01:
1 = BOR Enabled
0 = BOR Disabled
Unimplemented: Read as ‘0’
BORRDY: Brown-out Reset Circuit Ready Status bit
1 = The Brown-out Reset circuit is active
0 = The Brown-out Reset circuit is inactive
Note 1: BOREN<1:0> bits are located in Configuration Words.
5.4 MCLR
The MCLR is an optional external input that can reset
the device. The MCLR function is controlled by the
MCLRE bit of Configuration Words and the LVP bit of
Configuration Words (Table 5-2).
TABLE 5-2:
MCLRE
0
1
x
MCLR CONFIGURATION
LVP
MCLR
0
Disabled
0
Enabled
1
Enabled
5.4.1 MCLR ENABLED
When MCLR is enabled and the pin is held low, the
device is held in Reset. The MCLR pin is connected to
VDD through an internal weak pull-up.
The device has a noise filter in the MCLR Reset path.
The filter will detect and ignore small pulses.
Note: A Reset does not drive the MCLR pin low.
5.5 Windowed Watchdog Timer
(WWDT) Reset
The Watchdog Timer generates a Reset if the firmware
does not issue a CLRWDT instruction within the time-out
period and the window is open. The TO and PD bits in
the STATUS register and the WDT bit in PCON are
changed to indicate a WDT Reset caused by the timer
overflowing, and WDTWV bit in the PCON register is
changed to indicate a WDT Reset caused by a window
violation. See Section 9.0 “Windowed Watchdog
Timer (WWDT)” for more information.
5.4.2 MCLR DISABLED
When MCLR is disabled, the pin functions as a general
purpose input and the internal weak pull-up is under
software control. See Section 12.2 “I/O Priorities” for
more information.
 2016 Microchip Technology Inc.
Preliminary
DS40001824A-page 103