PIC16LF18854 Datasheet, PDF (579/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
TABLE 33-2: SUMMARY OF REGISTERS ASSOCIATED WITH EUSART
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register
on Page
INTCON
GIE
PEIE
―
―
―
―
―
PIR3
—
—
RCIF
TXIF
BCL2IF
SSP2IF BCL1IF
PIE3
—
—
RCIE
TXIE
BCL2IE
SSP2IE BCL1IE
RC1STA
SPEN
RX9
SREN CREN
ADDEN
FERR
OERR
TX1STA
CSRC
TX9
TXEN
SYNC
SENDB
BRGH
TRMT
BAUD1CON ABDOVF
RCIDL
―
SCKP
BRG16
―
WUE
RC1REG
RC1REG<7:0>
TX1REG
TX1REG<7:0>
SPB1RGL
SP1BRG<7:0>
SPB1RGH
SP1BRG<15:8>
RXPPS
―
―
―
RXPPS<4:0>
CKPPS
―
―
―
CXPPS<4:0>
RxyPPS
―
―
―
RxyPPS<4:0>
CLCxSELy
―
―
―
LCxDyS<4:0>
MDSRC
―
―
―
MDMS<4:0>
Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used for the EUSART module.
* Page with register information.
INTEDG
SSP1IF
SSP1IE
RX9D
TX9D
ABDEN
132
145
136
575
574
576
559*
557*
563*
563*
247
247
248
329
399
 2016 Microchip Technology Inc.
Preliminary
DS40001824A-page 579