PIC16LF18854 Datasheet, PDF (509/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
REGISTER 31-7: SSPxBUF: MSSPx BUFFER REGISTER
R/W-x
R/W-x
R/W-x
R/W-x
R/W-x
SSPxBUF<7:0>
bit 7
R/W-x
R/W-x
R/W-x
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-0
SSPxBUF<7:0>: MSSP Buffer bits
TABLE 31-3: SUMMARY OF REGISTERS ASSOCIATED WITH MSSPx
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
INTCON
GIE
PEIE
—
—
—
—
—
PIR1
OSFIF
CSWIF
—
—
—
—
ADTIF
PIE1
OSFIE
CSWIE
—
—
—
—
ADTIE
SSP1STAT
SMP
CKE
D/A
P
S
R/W
UA
SSP1CON1
WCOL SSPOV SSPEN
CKP
SSPM<3:0>
SSP1CON2
GCEN ACKSTAT ACKDT ACKEN
RCEN
PEN
RSEN
SSP1CON3
ACKTIM
PCIE
SCIE
BOEN
SDAHT SBCDE
AHEN
SSP1MSK
SSPMSK<7:0>
SSP1ADD
SSPADD<7:0>
SSP1BUF
SSPBUF<7:0>
SSP2STAT
SMP
CKE
D/A
P
S
R/W
UA
SSP2CON1
WCOL SSPOV SSPEN
CKP
SSPM<3:0>
SSP2CON2
GCEN ACKSTAT ACKDT ACKEN
RCEN
PEN
RSEN
SSP2CON3
ACKTIM
PCIE
SCIE
BOEN
SDAHT SBCDE
AHEN
SSP2MSK
SSPMSK<7:0>
SSP2ADD
SSPADD<7:0>
SSP2BUF
SSPBUF<7:0>
SSP1CLKPPS
—
—
—
SSP1CLKPPS<4:0>
SSP1DATPPS
—
—
—
SSP1DATPPS<4:0>
SSP1SSPPS
—
—
—
SSP1SSPPS<4:0>
SSP2CLKPPS
—
—
—
SSP2CLKPPS<4:0>
SSP2DATPPS
—
—
—
SSP2DATPPS<4:0>
SSP2SSPPS
—
—
—
SSP2SSPPS<4:0>
RxyPPS
—
—
—
RxyPPS<4:0>
Legend: — = Unimplemented location, read as ‘0’. Shaded cells are not used by the MSSPx module
Note 1: When using designated I²C pins, the associated pin values in INLVLx will be ignored.
Bit 0
INTEDG
ADIF
ADIE
BF
SEN
DHEN
BF
SEN
DHEN
Register
on Page
132
143
134
504
505
506
504
508
508
509
504
505
506
504
508
508
509
247
247
247
247
247
247
248
 2016 Microchip Technology Inc.
Preliminary
DS40001824A-page 509