PIC16LF18854 Datasheet, PDF (382/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
REGISTER 24-2: NCO1CLK: NCO1 INPUT CLOCK CONTROL REGISTER
R/W-0/0
R/W-0/0
R/W-0/0
U-0
N1PWS<2:0>^(1,2)
—
U-0
R/W-0/0
R/W-0/0
—
N1CKS<2:0>
bit 7
R/W-0/0
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-5
bit 4-3
bit 2-0
N1PWS<2:0>: NCO1 Output Pulse Width Select bits^(1,2)
111 = NCO1 output is active for 128 input clock periods
110 = NCO1 output is active for 64 input clock periods
101 = NCO1 output is active for 32 input clock periods
100 = NCO1 output is active for 16 input clock periods
011 = NCO1 output is active for 8 input clock periods
010 = NCO1 output is active for 4 input clock periods
001 = NCO1 output is active for 2 input clock periods
000 = NCO1 output is active for 1 input clock period
Unimplemented: Read as ‘0’
N1CKS<2:0>: NCO1 Clock Source Select bits
110 = Reserved
•
•
•
111 = Reserved
101 = LC4_out
100 = LC3_out
011 = LC2_out
010 = LC1_out
001 = HFINTOSC
000 = FOSC
Note 1: N1PWS applies only when operating in Pulse Frequency mode.
2: If NCO1 pulse width is greater than NCO1 overflow period, operation is undefined.
DS40001824A-page 382
Preliminary
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