PIC16LF18854 Datasheet, PDF (48/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
TABLE 3-11:
F0Ch
F0Dh
F0Eh
F0Fh
F10h
F11h
F12h
F13h
F14h
F15h
F16h
F17h
F18h
F19h
F1Ah
F1Bh
F1Ch
F1Dh
F1Eh
F1Fh
F20h
F21h
F22h
F23h
F24h
F25h
F26h
F27h
F28h
F37h
F38h
F39h
F3Ah
F3Bh
F3Ch
F3Dh
F3Eh
F3Fh
PIC16(L)F18876 MEMORY MAP, BANK 30
Bank 30
—
—
—
—
RA0PPS
RA1PPS
RA2PPS
RA3PPS
RA4PPS
RA5PPS
RA6PPS
RA7PPS
RB0PPS
RB1PPS
RB2PPS
RB3PPS
RB4PPS
RB5PPS
RB6PPS
RB7PPS
RC0PPS
RC1PPS
RC2PPS
RC3PPS
RC4PPS
RC5PPS
RC6PPS
RC7PPS
—
ANSELA
WPUA
ODCONA
SLRCONA
INLVLA
IOCAP
F40h
F41h
F42h
F43h
F44h
F45h
F46h
F47h
F48h
F49h
F4Ah
F4Bh
F4Ch
F4Dh
F4Eh
F4Fh
F50h
F51h
F52h
F53h
F54h
F55h
F56h
F57h
F58h
F59h
F5Ah
F5Bh
F5Ch
F5Dh
F5Eh
F5Fh
F60h
F61h
F62h
F63h
Bank 30
CCDNA
CCDPA
—
ANSELB
WPUB
ODCONB
SLRCONB
INLVLB
IOCBP
IOCBN
IOCBF
CCDNB
CCDPB
—
ANSELC
WPUC
ODCONC
SLRCONC
INLVLC
IOCCP
IOCCN
IOCCF
CCDNC
CCDPC
—
ANSELD
WPUD
ODCOND
SLRCOND
INLVLD
—
—
—
CCDND
CCDPD
—
IOCAN
IOCAF
Legend:
= Unimplemented data memory locations, read as ‘0’.
DS40001824A-page 48
Preliminary
F64h
F65h
F66h
F67h
F68h
F69h
F6Ah
F6Bh
F6Ch
F6Dh
F6Eh
F6Fh
Bank 30
ANSELE
WPUE
ODCONE
SLRCONE
INLVLE
IOCEP
IOCEN
IOCEF
CCDNE
CCDPE
—
—
 2016 Microchip Technology Inc.