PIC16LF18854 Datasheet, PDF (313/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
TABLE 20-4:
SUMMARY OF REGISTERS ASSOCIATED WITH CWG
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
CWG1CLKCON
—
—
—
—
—
—
—
CWG1ISM
—
—
—
—
IS<3:0>
CWG1DBR
—
—
DBR<5:0>
CWG1DBF
—
—
DBF<5:0>
CWG1CON0
EN
LD
—
—
—
MODE<2:0>
CWG1CON1
—
—
IN
—
POLD
POLC
POLB
CWG1AS0
SHUTDOWN
REN
LSBD<1:0>
LSAC<1:0>
—
CWG1AS1
—
AS6E
AS5E
AS4E
AS3E
AS2E
AS1E
CWG1STR
OVRD
OVRC
OVRB
OVRA
STRD
STRC
STRB
CWG2CLKCON
—
—
—
—
—
—
—
CWG2ISM
—
—
—
—
IS<3:0>
CWG2DBR
—
—
DBR<5:0>
CWG2DBF
—
—
DBF<5:0>
CWG2CON0
EN
LD
—
—
—
MODE<2:0>
CWG2CON1
—
—
IN
—
POLD
POLC
POLB
CWG2AS0
SHUTDOWN
REN
LSBD<1:0>
LSAC<1:0>
—
CWG2AS1
—
AS6E
AS5E
AS4E
AS3E
AS2E
AS1E
CWG2STR
OVRD
OVRC
OVRB
OVRA
STRD
STRC
STRB
CWG3CLKCON
—
—
—
—
—
—
—
CWG3ISM
—
—
—
—
IS<3:0>
CWG3DBR
—
—
DBR<5:0>
CWG3DBF
—
—
DBF<5:0>
CWG3CON0
EN
LD
—
—
—
MODE<2:0>
CWG3CON1
—
—
IN
—
POLD
POLC
POLB
CWG3AS0
SHUTDOWN
REN
LSBD<1:0>
LSAC<1:0>
—
CWG3AS1
—
AS6E
AS5E
AS4E
AS3E
AS2E
AS1E
CWG3STR
OVRD
OVRC
OVRB
OVRA
STRD
STRC
STRB
Legend: – = unimplemented locations read as ‘0’. Shaded cells are not used by CWG.
Bit 0
CS
POLA
—
AS0E
STRA
CS
POLA
—
AS0E
STRA
CS
POLA
—
AS0E
STRA
Register
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 2016 Microchip Technology Inc.
Preliminary
DS40001824A-page 313