PIC16LF18854 Datasheet, PDF (200/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
12.4 PORTA Registers
12.4.1 DATA REGISTER
PORTA is an 8-bit wide, bidirectional port. The
corresponding data direction register is TRISA
(Register 12-3). Setting a TRISA bit (= 1) will make the
corresponding PORTA pin an input (i.e., disable the
output driver). Clearing a TRISA bit (= 0) will make the
corresponding PORTA pin an output (i.e., enables
output driver and puts the contents of the output latch
on the selected pin). Example 12.4.9 shows how to
initialize PORTA.
Reading the PORTA register (Register 12-2) reads the
status of the pins, whereas writing to it will write to the
PORT latch. All write operations are read-modify-write
operations. Therefore, a write to a port implies that the
port pins are read, this value is modified and then
written to the PORT data latch (LATA).
The PORT data latch LATA (Register 12-4) holds the
output port data, and contains the latest value of a
LATA or PORTA write.
EXAMPLE 12-1: INITIALIZING PORTA
; This code example illustrates
; initializing the PORTA register. The
; other ports are initialized in the same
; manner.
BANKSEL PORTA
;
CLRF PORTA
;Init PORTA
BANKSEL LATA
;Data Latch
CLRF LATA
;
BANKSEL ANSELA
;
CLRF ANSELA
;digital I/O
BANKSEL TRISA
;
MOVLW B'00111000' ;Set RA<5:3> as inputs
MOVWF TRISA
;and set RA<2:0> as
;outputs
12.4.2 DIRECTION CONTROL
The TRISA register (Register 12-3) controls the
PORTA pin output drivers, even when they are being
used as analog inputs. The user should ensure the bits
in the TRISA register are maintained set when using
them as analog inputs. I/O pins configured as analog
inputs always read ‘0’.
12.4.3 OPEN-DRAIN CONTROL
The ODCONA register (Register 12-7) controls the
open-drain feature of the port. Open-drain operation is
independently selected for each pin. When an
ODCONA bit is set, the corresponding port output
becomes an open-drain driver capable of sinking
current only. When an ODCONA bit is cleared, the
corresponding port output pin is the standard push-pull
drive capable of sourcing and sinking current.
Note:
It is not necessary to set open-drain
control when using the pin for I²C; the I²C
module controls the pin and makes the pin
open-drain.
12.4.4 SLEW RATE CONTROL
The SLRCONA register (Register 12-8) controls the
slew rate option for each port pin. Slew rate control is
independently selectable for each port pin. When an
SLRCONA bit is set, the corresponding port pin drive is
slew rate limited. When an SLRCONA bit is cleared,
The corresponding port pin drive slews at the maximum
rate possible.
DS40001824A-page 200
Preliminary
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