PIC16LF18854 Datasheet, PDF (294/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

FIGURE 20-3:
SIMPLIFIED CWG BLOCK DIAGRAM (FORWARD AND REVERSE FULL-BRIDGE MODES)
See
CWGxISM
Register
CWGxISM<3:0>
EN
SHUTDOWN
HFINTOSC
FOSC
CWGxCLK<0>
MODE0
Reverse Deadband Block
clock
signal_out
signal_in
D
Q
ERQ
CWG_data
D
Q
Q
clock
signal_out
signal_in
Forward Deadband Block
1
0
Rev. 10-000165B
8/29/2014
CWG_dataA
CWG_dataB
CWG_dataC
CWG_dataD