PIC16LF18854 Datasheet, PDF (411/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
28.1 Timer1 Operation
The Timer1 modules are 16-bit incrementing counters
which are accessed through the TMR1H:TMR1L
register pairs. Writes to TMR1H or TMR1L directly
update the counter.
When used with an internal clock source, the module is
a timer and increments on every instruction cycle.
When used with an external clock source, the module
can be used as either a timer or counter and incre-
ments on every selected edge of the external source.
The timer is enabled by configuring the TMR1ON and
GE bits in the T1CON and T1GCON registers, respec-
tively. Table 28-1 displays the Timer1 enable selec-
tions.
TABLE 28-1:
TMR1ON
1
1
0
0
TIMER1 ENABLE
SELECTIONS
TMR1GE
Timer1
Operation
1
Count Enabled
0
Always On
1
Off
0
Off
28.2 Clock Source Selection
The T1CLK register is used to select the clock source for
the timer. Register 28-3 shows the possible clock
sources that may be selected to make the timer
increment.
28.2.1 INTERNAL CLOCK SOURCE
When the internal clock source FOSC is selected, the
TMR1H:TMR1L register pair will increment on multiples
of FOSC as determined by the respective Timer1
prescaler.
When the FOSC internal clock source is selected, the
timer register value will increment by four counts every
instruction clock cycle. Due to this condition, a 2 LSB
error in resolution will occur when reading the
TMR1H:TMR1L value. To utilize the full resolution of the
timer in this mode, an asynchronous input signal must
be used to gate the timer clock input.
Out of the total timer gate signal sources, the following
subset of sources can be asynchronous and may be
useful for this purpose:
• CLC4 output
• CLC3 output
• CLC2 output
• CLC1 output
• Zero-Cross Detect output
• Comparator2 output
• Comparator1 output
• TxG PPS remappable input pin
28.2.2 EXTERNAL CLOCK SOURCE
When the timer is enabled and the external clock input
source (ex: T1CKI PPS remappable input) is selected as
the clock source, the timer will increment on the rising
edge of the external clock input.
When using an external clock source, the timer can be
configured to run synchronously or asynchronously, as
described in Section 28.5 “Timer Operation in
Asynchronous Counter Mode”.
When used as a timer with a clock oscillator, an
external 32.768 kHz crystal can be used connected to
the SOSCI/SOSCO pins.
Note:
In Counter mode, a falling edge must be
registered by the counter prior to the first
incrementing rising edge after any one or
more of the following conditions:
• The timer is first enabled after POR
• Firmware writes to TMR1H or TMR1L
• The timer is disabled
• The timer is re-enabled (e.g.,
TMR1ON-->1) when the T1CKI sig-
nal is currently logic low.
 2016 Microchip Technology Inc.
Preliminary
DS40001824A-page 411