PIC16LF18854 Datasheet, PDF (393/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
26.1 DSM Operation
The DSM module can be enabled by setting the MDEN
bit in the MDCON register. Clearing the MDEN bit in the
MDCON register, disables the DSM module by auto-
matically switching the carrier high and carrier low sig-
nals to the VSS signal source. The modulator signal
source is also switched to the MDBIT in the MDCON
register. This not only assures that the DSM module is
inactive, but that it is also consuming the least amount
of current.
The values used to select the carrier high, carrier low,
and modulator sources held by the Modulation Source,
Modulation High Carrier, and Modulation Low Carrier
control registers are not affected when the MDEN bit is
cleared and the DSM module is disabled. The values
inside these registers remain unchanged while the
DSM is inactive. The sources for the carrier high, car-
rier low and modulator signals will once again be
selected when the MDEN bit is set and the DSM
module is again enabled and active.
The modulated output signal can be disabled without
shutting down the DSM module. The DSM module will
remain active and continue to mix signals, but the out-
put value will not be sent to the DSM pin. During the
time that the output is disabled, the DSM pin will remain
low. The modulated output can be disabled by clearing
the MDEN bit in the MDCON register.
26.2 Modulator Signal Sources
The modulator signal can be supplied from the
following sources:
• External Signal on MDSRCPPS pin
• MDBIT bit in the MDCON0 register
• CCP1 Signal
• CCP2 Signal
• CCP3 Signal
• CCP4 Signal
• CCP5 Signal
• PWM6 Signal
• PWM7 Signal
• NCO output
• Comparator C1 Signal
• Comparator C2 Signal
• CLC1 Output
• CLC2 Output
• CLC3 Output
• CLC4 Output
• EUSART DT Signal
• EUSART TX/CK Signal
• MSSP1 SDO Signal (SPI Mode Only)
• MSSP2 SDO Signal
The modulator signal is selected by configuring the
MDMS <4:0> bits in the MDSRC register.
26.3 Carrier Signal Sources
The carrier high signal and carrier low signal can be
supplied from the following sources:
• External Signal on MDCARH/LPPS pins
• FOSC (system clock)
• HFINTOSC
• Reference Clock Module Signal
• CCP1 Signal
• CCP2 Signal
• CCP3 Signal
• CCP4 Signal
• CCP5 Signal
• PWM6 Output
• PWM7 Output
• NCO output
• CLC1 output
• CLC2 output
• CLC3 output
• CLC4 output
The carrier high signal is selected by configuring the
MDCHS <3:0> bits in the MDCARH register. The
carrier low signal is selected by configuring the MDCLS
<3:0> bits in the MDCARL register.
26.4 Carrier Synchronization
During the time when the DSM switches between car-
rier high and carrier low signal sources, the carrier data
in the modulated output signal can become truncated.
To prevent this, the carrier signal can be synchronized
to the modulator signal. When synchronization is
enabled, the carrier pulse that is being mixed at the
time of the transition is allowed to transition low before
the DSM switches over to the next carrier source.
Synchronization is enabled separately for the carrier
high and carrier low signal sources. Synchronization for
the carrier high signal is enabled by setting the
MDCHSYNC bit in the MDCON1 register.
Synchronization for the carrier low signal is enabled by
setting the MDCLSYNC bit in the MDCON1 register.
Figure 26-1 through Figure 26-6 show timing diagrams
of using various synchronization methods.
 2016 Microchip Technology Inc.
Preliminary
DS40001824A-page 393