PIC16LF18854 Datasheet, PDF (284/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
19.1 Standard PWM Mode
The standard PWM mode generates a Pulse-Width
Modulation (PWM) signal on the PWMx pin with up to
ten bits of resolution. The period, duty cycle, and
resolution are controlled by the following registers:
• TMR2 register
• PR2 register
• PWMxCON registers
• PWMxDCH registers
• PWMxDCL registers
Figure 19-2 shows a simplified block diagram of PWM
operation.
If PWMPOL = 0, the default state of the output is ‘0‘. If
PWMPOL = 1, the default state is ‘1’. If PWMEN = ‘0’,
the output will be the default state.
Note:
The corresponding TRIS bit must be
cleared to enable the PWM output on the
PWMx pin
FIGURE 19-2:
SIMPLIFIED PWM BLOCK DIAGRAM
Duty cycle registers
PWMxDCH
PWMxDCL<7:6>
10-bit Latch
(Not visible to user)
Rev. 10-000022B
9/24/2014
PWMx_out
To Peripherals
Comparator
TMR2 Module
TMR2
R ₍₁₎
R
Q
0
PPS
1
S
Q
PWMxPOL ^RxyPPS
PWMx
TRIS Control
Comparator
PR2
T2_match
Note 1: 8-bit timer is concatenated with two bits generated by Fosc or two bits of the internal prescaler to
create 10-bit time-base.
DS40001824A-page 284
Preliminary
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