PIC16LF18854 Datasheet, PDF (329/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
REGISTER 22-3: CLCxSEL0: GENERIC CLCx DATA 0 SELECT REGISTER
U-0
—
bit 7
U-0
R/W-x/u
R/W-x/u
R/W-x/u
R/W-x/u
R/W-x/u
—
LCxD1S<5:0>
R/W-x/u
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-6
bit 5-0
Unimplemented: Read as ‘0’
LCxD1S<5:0>: CLCx Data1 Input Selection bits
See Table 22-2.
REGISTER 22-4: CLCxSEL1: GENERIC CLCx DATA 1 SELECT REGISTER
U-0
—
bit 7
U-0
R/W-x/u
R/W-x/u
R/W-x/u
R/W-x/u
R/W-x/u
—
LCxD2S<5:0>
R/W-x/u
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-6
bit 5-0
Unimplemented: Read as ‘0’
LCxD2S<5:0>: CLCx Data 2 Input Selection bits
See Table 22-2.
REGISTER 22-5: CLCxSEL2: GENERIC CLCx DATA 2 SELECT REGISTER
U-0
—
bit 7
U-0
R/W-x/u
R/W-x/u
R/W-x/u
R/W-x/u
R/W-x/u
—
LCxD3S<5:0>
R/W-x/u
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-6
bit 5-0
Unimplemented: Read as ‘0’
LCxD3S<5:0>: CLCx Data 3 Input Selection bits
See Table 22-2.
REGISTER 22-6: CLCxSEL3: GENERIC CLCx DATA 3 SELECT REGISTER
U-0
—
bit 7
U-0
R/W-x/u
R/W-x/u
R/W-x/u
R/W-x/u
R/W-x/u
—
LCxD4S<5:0>
R/W-x/u
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
bit 7-6
bit 5-0
Unimplemented: Read as ‘0’
LCxD4S<5:0>: CLCx Data 4 Input Selection bits
See Table 22-2.
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
 2016 Microchip Technology Inc.
Preliminary
DS40001824A-page 329