PIC16LF18854 Datasheet, PDF (185/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
REGISTER 10-6: NVMCON2: NONVOLATILE MEMORY CONTROL 2 REGISTER
W-0/0
W-0/0
W-0/0
W-0/0
W-0/0
W-0/0
W-0/0
NVMCON2<7:0>
bit 7
W-0/0
bit 0
Legend:
R = Readable bit
S = Bit can only be set
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-0
NVMCON2<7:0>: Flash Memory Unlock Pattern bits
To unlock writes, a 55h must be written first, followed by an AAh, before setting the WR bit of the
NVMCON1 register. The value written to this register is used to unlock the writes.
TABLE 10-5: SUMMARY OF REGISTERS ASSOCIATED WITH NONVOLATILE MEMORY (NVM)
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register
on Page
INTCON
GIE
PEIE
—
—
—
—
—
INTEDG
132
PIE7
SCANIE CRCIE
NVMIE NCO1IE
—
CWG3IE CWG2IE CWG1IE
135
PIR7
SCANIF CRCIF
NVMIF NCO1IF
—
CWG3IF CWG2IF CWG1IF
144
NVMCON1
—
NVMREGS LWLO
FREE
WRERR WREN
WR
RD
184
NVMCON2
NVMCON2<7:0>
185
NVMADRL
NVMADR<7:0>
183
NVMADRH
—⁽¹⁾
NVMADR<14:8>
183
NVMDATL
NVMDAT<7:0>
183
NVMDATH
—
—
NVMDAT<13:8>
183
Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used by NVM.
Note 1: Unimplemented, read as ‘1’.
 2016 Microchip Technology Inc.
Preliminary
DS40001824A-page 185