PIC16LF18854 Datasheet, PDF (49/668 Pages) Microchip Technology – C Compiler Optimized RISC Architecture

PIC16(L)F18856/76
TABLE 3-12: SPECIAL FUNCTION REGISTER SUMMARY BANKS 0-31 (ALL BANKS)
Address Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on:
POR, BOR
Value on all
other
Resets
All Banks
000h
INDF0
Addressing this location uses contents of FSR0H/FSR0L to address data memory (not a
physical register)
xxxx xxxx xxxx xxxx
001h
INDF1
Addressing this location uses contents of FSR1H/FSR1L to address data memory (not a
physical register)
xxxx xxxx xxxx xxxx
002h
PCL
Program Counter (PC) Least Significant Byte
0000 0000 0000 0000
003h
STATUS
—
—
—
TO
PD
Z
DC
C
---1 1000 ---q quuu
004h
FSR0L
Indirect Data Memory Address 0 Low Pointer
0000 0000 uuuu uuuu
005h
FSR0H
Indirect Data Memory Address 0 High Pointer
0000 0000 0000 0000
006h
FSR1L
Indirect Data Memory Address 1 Low Pointer
0000 0000 uuuu uuuu
007h
FSR1H
Indirect Data Memory Address 1 High Pointer
0000 0000 0000 0000
008h
BSR
—
—
—
BSR4
BSR3
BSR2
BSR1
BSR0 ---0 0000 ---0 0000
009h
WREG
Working Register
0000 0000 uuuu uuuu
00Ah
PCLATH
—
Write Buffer for the upper 7 bits of the Program Counter
-000 0000 -000 0000
00Bh
INTCON
GIE
PEIE
—
—
—
—
—
INTEDG 00-- ---1 00-- ---1
Legend:
x = unknown, u = unchanged, q =depends on condition, - = unimplemented, read as ‘0’, r = reserved. Shaded locations
unimplemented, read as ‘0’.
Note 1: These Registers can be accessed from any bank
 2016 Microchip Technology Inc.
Preliminary
DS40001824A-page 49